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Current IssueBreaking High-speed Material Constraints
Do you need specialty materials for your high-speed designs? Maybe not. Improvements in resins mean designers of high-speed boards can sometimes use traditional laminate systems. Learn more in this issue.
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This month, our contributors discuss the PCB design classes available at IPC APEX EXPO 2024. As they explain, these courses cover everything from the basics of design through avoiding over-constraining high-speed boards, and so much more!
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In this issue, our expert contributors discuss the many opportunities and challenges in the PCB design community, and what can be done to grow the numbers of PCB designers—and design instructors.
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iNEMI Packaging Tech Topic Series Webinar: LSI/PKG/PCB Co-Design
November 21, 2023 | iNEMIEstimated reading time: 1 minute
iNEMI Packaging Tech Topic Series Webinar, LSI/PKG/PCB Co-Design to Support 3D-IC/Chiplet Design will be held on November 28, 2023, by guest speaker Kazunari Koga, Zuken Inc.
Chips and packages have different manufacturing methods and data sizes, so the design tools are also different. This webinar will introduce new software technology that can handle — in one tool —two types of design data. This technology connects design data for different technologies in a hierarchical structure and allows all data to be edited simultaneously. It also addresses the issues of designing a package that implements chiplets. This includes the challenges of large-scale design data (due to increasing nets between chips), device implementation of heterogeneous technologies with a mixture of substrate and silicon, and I/O design complexity.
About the Speaker
Kazunari Koga
Zuken Inc.
Mr. Koga has been working with development of an LSI/package/board (LPB) co-design environment since 2007. He joined the JEITA LPB working group in 2010, and participated in the development of LPB formats, which became an IEEE standard in 2015. He was also involved in the Semiconductor Technology Academic Research Center’s (STARC’s) development of a design methodology for 3D ICs, and the New Energy and Industrial Technology Development Organization’s (NEDO’s) development project for a 3D integrated design and verification platform.
Registration
This event is open to industry; advance registration is required. If you have any questions or need additional information, please visit iNEMI’s website.
November 28, 2023
8:00-9:00 a.m. EST (US)
2:00-3:00 p.m. CET (Europe)
10:00-11:00 p.m. JST (Japan)
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